From my product development experiences, entering into Design Verification and Design Validation is always bittersweet. Exciting because yes, to get to Design Verification means that we have ...

As artificial intelligence, high-performance computing, and next-generation communication networks converge, the complexity ...

Bringing agentic AI into chip verification to accelerate design cycles, improve verification quality, and increase ...

Over the years, Electronic Design Automation (EDA) tools have matured considerably. They now aid in design and verification of all aspects of chip manufacturing. One area that has lagged behind is the ...

Transaction level modeling (TLM) is gaining favor over register-transfer level (RTL) for design components because of its many advantages—including faster design and verification times, easier ...

We have started to see what may be the largest disturbance in the role of a verification engineer since the founding of the ...

Context-aware checks integrate physical and electrical information to evaluate a wide range of design conditions, from advanced design rule compliance, to circuit and reliability verification, to ...

After years of innovation in verification of increasingly complex should we now turn our attention to the design process itself? Since starting in verification in the early 90’s I have witnessed the ...

As complex as today’s systems on chip (SoCs) are, it’s simply not possible to go “by the seat of your pants” and hope for a project to complete successfully. You must be thorough and methodical in ...

It’s time to put to rest 11 of the most common myths about verification intellectual property (VIP). SmartDV’s Bipul Talukdar, Director of Applications Engineering, explains why it’s used in a ...